FLASH¶

Module: LIBDAISY / DEVICE

External Flash Memory. More...

Defines¶

	Name
	ENTER_DEEP_POWER_DOWN
	EXIT_DEEP_POWER_DOWN
	RESET_ENABLE_CMD
	RESET_MEMORY_CMD
	READ_ID_CMD
	READ_ID_CMD2
	MULTIPLE_IO_READ_ID_CMD
	READ_SERIAL_FLASH_DISCO_PARAM_CMD
	READ_MANUFACT_AND_ID
	READ_UNIQUE_ID
	NO_OP
	SECTOR_UNLOCK
	SECTOR_LOCK
	INFO_ROW_ERASE_CMD
	INFO_ROW_PROGRAM_CMD
	INFO_ROW_READ_CMD
	READ_CMD
	FAST_READ_CMD
	FAST_READ_DTR_CMD
	DUAL_OUT_FAST_READ_CMD
	DUAL_INOUT_FAST_READ_CMD
	DUAL_INOUT_FAST_READ_DTR_CMD
	QUAD_OUT_FAST_READ_CMD
	QUAD_INOUT_FAST_READ_CMD
	QUAD_INOUT_FAST_READ_DTR_CMD
	WRITE_ENABLE_CMD
	WRITE_DISABLE_CMD
	READ_STATUS_REG_CMD
	WRITE_STATUS_REG_CMD
	READ_FUNCTION_REGISTER
	WRITE_FUNCTION_REGISTER
	WRITE_READ_PARAM_REG_CMD
	PAGE_PROG_CMD
	QUAD_IN_PAGE_PROG_CMD
	EXT_QUAD_IN_PAGE_PROG_CMD
	SECTOR_ERASE_CMD
	SECTOR_ERASE_QPI_CMD
	BLOCK_ERASE_CMD
	BLOCK_ERASE_32K_CMD
	CHIP_ERASE_CMD
	EXT_CHIP_ERASE_CMD
	PROG_ERASE_RESUME_CMD
	EXT_PROG_ERASE_RESUME_CMD
	PROG_ERASE_SUSPEND_CMD
	EXT_PROG_ERASE_SUSPEND_CMD
	ENTER_QUAD_CMD
	EXIT_QUAD_CMD
	IS25LP064A_SR_WIP IS25LP08D Registers
	IS25LP064A_SR_WREN
	IS25LP064A_SR_SRWREN
	IS25LP064A_SR_QE
	IS25LP064A_NVCR_NBADDR
	IS25LP064A_NVCR_SEGMENT
	IS25LP064A_NVCR_DUAL
	IS25LP064A_NVCR_QUAB
	IS25LP064A_NVCR_RH
	IS25LP064A_NVCR_DTRP
	IS25LP064A_NVCR_ODS
	IS25LP064A_NVCR_XIP
	IS25LP064A_NVCR_NB_DUMMY
	IS25LP064A_VCR_WRAP
	IS25LP064A_VCR_XIP
	IS25LP064A_VCR_NB_DUMMY
	IS25LP064A_EAR_HIGHEST_SE
	IS25LP064A_EAR_THIRD_SEG
	IS25LP064A_EAR_SECOND_SEG
	IS25LP064A_EAR_LOWEST_SEG
	IS25LP064A_EVCR_ODS
	IS25LP064A_EVCR_RH
	IS25LP064A_EVCR_DTRP
	IS25LP064A_EVCR_DUAL
	IS25LP064A_EVCR_QUAD
	IS25LP064A_FSR_NBADDR
	IS25LP064A_FSR_PRERR
	IS25LP064A_FSR_PGSUS
	IS25LP064A_FSR_PGERR
	IS25LP064A_FSR_ERERR
	IS25LP064A_FSR_ERSUS
	IS25LP064A_FSR_READY
	ENTER_DEEP_POWER_DOWN
	EXIT_DEEP_POWER_DOWN
	RESET_ENABLE_CMD
	RESET_MEMORY_CMD
	READ_ID_CMD
	READ_ID_CMD2
	MULTIPLE_IO_READ_ID_CMD
	READ_SERIAL_FLASH_DISCO_PARAM_CMD
	READ_MANUFACT_AND_ID
	READ_UNIQUE_ID
	NO_OP
	SECTOR_UNLOCK
	SECTOR_LOCK
	INFO_ROW_ERASE_CMD
	INFO_ROW_PROGRAM_CMD
	INFO_ROW_READ_CMD
	PAGE_PROG_CMD
	PAGE_PROG_CMD
	QUAD_IN_PAGE_PROG_CMD
	EXT_QUAD_IN_PAGE_PROG_CMD
	READ_CMD
	FAST_READ_CMD
	FAST_READ_DTR_CMD
	DUAL_OUT_FAST_READ_CMD
	DUAL_INOUT_FAST_READ_CMD
	DUAL_INOUT_FAST_READ_DTR_CMD
	QUAD_OUT_FAST_READ_CMD
	QUAD_INOUT_FAST_READ_CMD
	QUAD_INOUT_FAST_READ_DTR_CMD
	WRITE_ENABLE_CMD
	WRITE_DISABLE_CMD
	READ_STATUS_REG_CMD
	WRITE_STATUS_REG_CMD
	READ_FUNCTION_REGISTER
	WRITE_FUNCTION_REGISTER
	READ_READ_PARAM_REG_CMD
	READ_EXT_READ_PARAM_CMD
	CLEAR_EXT_READ_PARAM_CMD
	WRITE_READ_PARAM_REG_CMD
	WRITE_NV_READ_PARAM_REG_CMD
	EXT_WRITE_READ_PARAM_REG_CMD
	WRITE_EXT_READ_PARAM_REG_CMD
	WRITE_EXT_NV_READ_PARAM_REG_CMD
	QUAD_IN_FAST_PROG_CMD
	EXT_QUAD_IN_FAST_PROG_CMD
	SECTOR_ERASE_CMD
	SECTOR_ERASE_QPI_CMD
	BLOCK_ERASE_CMD
	BLOCK_ERASE_32K_CMD
	CHIP_ERASE_CMD
	EXT_CHIP_ERASE_CMD
	PROG_ERASE_RESUME_CMD
	EXT_PROG_ERASE_RESUME_CMD
	PROG_ERASE_SUSPEND_CMD
	EXT_PROG_ERASE_SUSPEND_CMD
	ENTER_QUAD_CMD
	EXIT_QUAD_CMD
	IS25LP080D_SR_WIP IS25LP08D Registers
	IS25LP080D_SR_WREN
	IS25LP080D_SR_SRWREN
	IS25LP080D_SR_QE
	IS25LP080D_NVCR_NBADDR
	IS25LP080D_NVCR_SEGMENT
	IS25LP080D_NVCR_DUAL
	IS25LP080D_NVCR_QUAB
	IS25LP080D_NVCR_RH
	IS25LP080D_NVCR_DTRP
	IS25LP080D_NVCR_ODS
	IS25LP080D_NVCR_XIP
	IS25LP080D_NVCR_NB_DUMMY
	IS25LP080D_VCR_WRAP
	IS25LP080D_VCR_XIP
	IS25LP080D_VCR_NB_DUMMY
	IS25LP080D_EAR_HIGHEST_SE
	IS25LP080D_EAR_THIRD_SEG
	IS25LP080D_EAR_SECOND_SEG
	IS25LP080D_EAR_LOWEST_SEG
	IS25LP080D_EVCR_ODS
	IS25LP080D_EVCR_RH
	IS25LP080D_EVCR_DTRP
	IS25LP080D_EVCR_DUAL
	IS25LP080D_EVCR_QUAD
	IS25LP080D_FSR_NBADDR
	IS25LP080D_FSR_PRERR
	IS25LP080D_FSR_PGSUS
	IS25LP080D_FSR_PGERR
	IS25LP080D_FSR_ERERR
	IS25LP080D_FSR_ERSUS
	IS25LP080D_FSR_READY

Detailed Description¶

External Flash Memory.

IS25LP08D Commands

Macros Documentation¶

define ENTER_DEEP_POWER_DOWN¶

#define ENTER_DEEP_POWER_DOWN 0XB9

Low Power Modes &

define EXIT_DEEP_POWER_DOWN¶

#define EXIT_DEEP_POWER_DOWN 0XB9

&

define RESET_ENABLE_CMD¶

#define RESET_ENABLE_CMD 0x66

Reset Operations

define RESET_MEMORY_CMD¶

#define RESET_MEMORY_CMD 0x99

&

define READ_ID_CMD¶

#define READ_ID_CMD 0xAB

Identification Operations

define READ_ID_CMD2¶

#define READ_ID_CMD2 0x9F

&

define MULTIPLE_IO_READ_ID_CMD¶

#define MULTIPLE_IO_READ_ID_CMD 0xAF

&

define READ_SERIAL_FLASH_DISCO_PARAM_CMD¶

#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A

&

define READ_MANUFACT_AND_ID¶

#define READ_MANUFACT_AND_ID 0x90

&

define READ_UNIQUE_ID¶

#define READ_UNIQUE_ID 0x4B

&

define NO_OP¶

#define NO_OP 0x00

Cancels Reset Enable

define SECTOR_UNLOCK¶

#define SECTOR_UNLOCK 0x26

&

define SECTOR_LOCK¶

#define SECTOR_LOCK 0x24

&

define INFO_ROW_ERASE_CMD¶

#define INFO_ROW_ERASE_CMD 0x64

Security Information Row &

define INFO_ROW_PROGRAM_CMD¶

#define INFO_ROW_PROGRAM_CMD 0x62

&

define INFO_ROW_READ_CMD¶

#define INFO_ROW_READ_CMD 0x68

&

define READ_CMD¶

#define READ_CMD 0x03

Read Operations

define FAST_READ_CMD¶

#define FAST_READ_CMD 0x0B

&

define FAST_READ_DTR_CMD¶

#define FAST_READ_DTR_CMD 0x0D

&

define DUAL_OUT_FAST_READ_CMD¶

#define DUAL_OUT_FAST_READ_CMD 0x3B

&

define DUAL_INOUT_FAST_READ_CMD¶

#define DUAL_INOUT_FAST_READ_CMD 0xBB

&

define DUAL_INOUT_FAST_READ_DTR_CMD¶

#define DUAL_INOUT_FAST_READ_DTR_CMD 0xBD

&

define QUAD_OUT_FAST_READ_CMD¶

#define QUAD_OUT_FAST_READ_CMD 0x6B

&

define QUAD_INOUT_FAST_READ_CMD¶

#define QUAD_INOUT_FAST_READ_CMD 0xEB

&

define QUAD_INOUT_FAST_READ_DTR_CMD¶

#define QUAD_INOUT_FAST_READ_DTR_CMD 0xED

&

define WRITE_ENABLE_CMD¶

#define WRITE_ENABLE_CMD 0x06

Write Operations

define WRITE_DISABLE_CMD¶

#define WRITE_DISABLE_CMD 0x04

&

define READ_STATUS_REG_CMD¶

#define READ_STATUS_REG_CMD 0x05

Register Operations

define WRITE_STATUS_REG_CMD¶

#define WRITE_STATUS_REG_CMD 0x01

&

define READ_FUNCTION_REGISTER¶

#define READ_FUNCTION_REGISTER 0X48

&

define WRITE_FUNCTION_REGISTER¶

#define WRITE_FUNCTION_REGISTER 0x42

&

define WRITE_READ_PARAM_REG_CMD¶

#define WRITE_READ_PARAM_REG_CMD 0xC0

&

define PAGE_PROG_CMD¶

#define PAGE_PROG_CMD 0x02

Page Program Operations

define QUAD_IN_PAGE_PROG_CMD¶

#define QUAD_IN_PAGE_PROG_CMD 0x32

&

define EXT_QUAD_IN_PAGE_PROG_CMD¶

#define EXT_QUAD_IN_PAGE_PROG_CMD 0x38

&

define SECTOR_ERASE_CMD¶

#define SECTOR_ERASE_CMD 0xd7

Erase Operations

define SECTOR_ERASE_QPI_CMD¶

#define SECTOR_ERASE_QPI_CMD 0x20

&

define BLOCK_ERASE_CMD¶

#define BLOCK_ERASE_CMD 0xD8

&

define BLOCK_ERASE_32K_CMD¶

#define BLOCK_ERASE_32K_CMD 0x52

&

define CHIP_ERASE_CMD¶

#define CHIP_ERASE_CMD 0xC7

&

define EXT_CHIP_ERASE_CMD¶

#define EXT_CHIP_ERASE_CMD 0x60

&

define PROG_ERASE_RESUME_CMD¶

#define PROG_ERASE_RESUME_CMD 0x7A

&

define EXT_PROG_ERASE_RESUME_CMD¶

#define EXT_PROG_ERASE_RESUME_CMD 0x30

&

define PROG_ERASE_SUSPEND_CMD¶

#define PROG_ERASE_SUSPEND_CMD 0x75

&

define EXT_PROG_ERASE_SUSPEND_CMD¶

#define EXT_PROG_ERASE_SUSPEND_CMD 0xB0

&

define ENTER_QUAD_CMD¶

#define ENTER_QUAD_CMD 0x35

Quad Operations

define EXIT_QUAD_CMD¶

#define EXIT_QUAD_CMD 0xF5

&

define IS25LP064A_SR_WIP¶

#define IS25LP064A_SR_WIP ((uint8_t)0x01)

IS25LP08D Registers

Write in progress

define IS25LP064A_SR_WREN¶

#define IS25LP064A_SR_WREN ((uint8_t)0x02)

Write enable latch

define IS25LP064A_SR_SRWREN¶

#define IS25LP064A_SR_SRWREN     ((uint8_t)0x80)

Status register write enable/disable

define IS25LP064A_SR_QE¶

#define IS25LP064A_SR_QE ((uint8_t)0x40)

&

define IS25LP064A_NVCR_NBADDR¶

#define IS25LP064A_NVCR_NBADDR     ((uint16_t)0x0001)

3-bytes or 4-bytes addressing

define IS25LP064A_NVCR_SEGMENT¶

#define IS25LP064A_NVCR_SEGMENT     ((uint16_t)0x0002)

Upper or lower 128Mb segment selected by default

define IS25LP064A_NVCR_DUAL¶

#define IS25LP064A_NVCR_DUAL ((uint16_t)0x0004)

Dual I/O protocol

define IS25LP064A_NVCR_QUAB¶

#define IS25LP064A_NVCR_QUAB ((uint16_t)0x0008)

Quad I/O protocol

define IS25LP064A_NVCR_RH¶

#define IS25LP064A_NVCR_RH ((uint16_t)0x0010)

Reset/hold

define IS25LP064A_NVCR_DTRP¶

#define IS25LP064A_NVCR_DTRP     ((uint16_t)0x0020)

Double transfer rate protocol

define IS25LP064A_NVCR_ODS¶

#define IS25LP064A_NVCR_ODS ((uint16_t)0x01C0)

Output driver strength

define IS25LP064A_NVCR_XIP¶

#define IS25LP064A_NVCR_XIP     ((uint16_t)0x0E00)

XIP mode at power-on reset

define IS25LP064A_NVCR_NB_DUMMY¶

#define IS25LP064A_NVCR_NB_DUMMY     ((uint16_t)0xF000)

Number of dummy clock cycles

define IS25LP064A_VCR_WRAP¶

#define IS25LP064A_VCR_WRAP ((uint8_t)0x03)

Wrap

define IS25LP064A_VCR_XIP¶

#define IS25LP064A_VCR_XIP ((uint8_t)0x08)

XIP

define IS25LP064A_VCR_NB_DUMMY¶

#define IS25LP064A_VCR_NB_DUMMY     ((uint8_t)0xF0)

Number of dummy clock cycles

define IS25LP064A_EAR_HIGHEST_SE¶

#define IS25LP064A_EAR_HIGHEST_SE     ((uint8_t)0x03)

Select the Highest 128Mb segment

define IS25LP064A_EAR_THIRD_SEG¶

#define IS25LP064A_EAR_THIRD_SEG     ((uint8_t)0x02)

Select the Third 128Mb segment

define IS25LP064A_EAR_SECOND_SEG¶

#define IS25LP064A_EAR_SECOND_SEG     ((uint8_t)0x01)

Select the Second 128Mb segment

define IS25LP064A_EAR_LOWEST_SEG¶

#define IS25LP064A_EAR_LOWEST_SEG     ((uint8_t)0x00)

Select the Lowest 128Mb segment (default)

define IS25LP064A_EVCR_ODS¶

#define IS25LP064A_EVCR_ODS ((uint8_t)0x07)

Output driver strength

define IS25LP064A_EVCR_RH¶

#define IS25LP064A_EVCR_RH ((uint8_t)0x10)

Reset/hold

define IS25LP064A_EVCR_DTRP¶

#define IS25LP064A_EVCR_DTRP     ((uint8_t)0x20)

Double transfer rate protocol

define IS25LP064A_EVCR_DUAL¶

#define IS25LP064A_EVCR_DUAL ((uint8_t)0x40)

Dual I/O protocol

define IS25LP064A_EVCR_QUAD¶

#define IS25LP064A_EVCR_QUAD ((uint8_t)0x80)

Quad I/O protocol

define IS25LP064A_FSR_NBADDR¶

#define IS25LP064A_FSR_NBADDR     ((uint8_t)0x01)

3-bytes or 4-bytes addressing

define IS25LP064A_FSR_PRERR¶

#define IS25LP064A_FSR_PRERR ((uint8_t)0x02)

Protection error

define IS25LP064A_FSR_PGSUS¶

#define IS25LP064A_FSR_PGSUS ((uint8_t)0x04)

Program operation suspended

define IS25LP064A_FSR_PGERR¶

#define IS25LP064A_FSR_PGERR ((uint8_t)0x10)

Program error

define IS25LP064A_FSR_ERERR¶

#define IS25LP064A_FSR_ERERR ((uint8_t)0x20)

Erase error

define IS25LP064A_FSR_ERSUS¶

#define IS25LP064A_FSR_ERSUS ((uint8_t)0x40)

Erase operation suspended

define IS25LP064A_FSR_READY¶

#define IS25LP064A_FSR_READY     ((uint8_t)0x80)

Ready or command in progress

define ENTER_DEEP_POWER_DOWN¶

#define ENTER_DEEP_POWER_DOWN 0XB9

Low Power Modes &

define EXIT_DEEP_POWER_DOWN¶

#define EXIT_DEEP_POWER_DOWN 0XB9

&

define RESET_ENABLE_CMD¶

#define RESET_ENABLE_CMD 0x66

Reset Operations

define RESET_MEMORY_CMD¶

#define RESET_MEMORY_CMD 0x99

&

define READ_ID_CMD¶

#define READ_ID_CMD 0xAB

Identification Operations

define READ_ID_CMD2¶

#define READ_ID_CMD2 0x9F

&

define MULTIPLE_IO_READ_ID_CMD¶

#define MULTIPLE_IO_READ_ID_CMD 0xAF

&

define READ_SERIAL_FLASH_DISCO_PARAM_CMD¶

#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A

&

define READ_MANUFACT_AND_ID¶

#define READ_MANUFACT_AND_ID 0x90

&

define READ_UNIQUE_ID¶

#define READ_UNIQUE_ID 0x4B

&

define NO_OP¶

#define NO_OP 0x00

Cancels Reset Enable

define SECTOR_UNLOCK¶

#define SECTOR_UNLOCK 0x26

&

define SECTOR_LOCK¶

#define SECTOR_LOCK 0x24

&

define INFO_ROW_ERASE_CMD¶

#define INFO_ROW_ERASE_CMD 0x64

Security Information Row &

define INFO_ROW_PROGRAM_CMD¶

#define INFO_ROW_PROGRAM_CMD 0x62

&

define INFO_ROW_READ_CMD¶

#define INFO_ROW_READ_CMD 0x68

&

define PAGE_PROG_CMD¶

#define PAGE_PROG_CMD 0x02

Page Program Operations

define PAGE_PROG_CMD¶

#define PAGE_PROG_CMD 0x02

Page Program Operations

define QUAD_IN_PAGE_PROG_CMD¶

#define QUAD_IN_PAGE_PROG_CMD 0x32

&

define EXT_QUAD_IN_PAGE_PROG_CMD¶

#define EXT_QUAD_IN_PAGE_PROG_CMD 0x38

&

define READ_CMD¶

#define READ_CMD 0x03

Read Operations

define FAST_READ_CMD¶

#define FAST_READ_CMD 0x0B

&

define FAST_READ_DTR_CMD¶

#define FAST_READ_DTR_CMD 0x0D

&

define DUAL_OUT_FAST_READ_CMD¶

#define DUAL_OUT_FAST_READ_CMD 0x3B

&

define DUAL_INOUT_FAST_READ_CMD¶

#define DUAL_INOUT_FAST_READ_CMD 0xBB

&

define DUAL_INOUT_FAST_READ_DTR_CMD¶

#define DUAL_INOUT_FAST_READ_DTR_CMD 0xBD

&

define QUAD_OUT_FAST_READ_CMD¶

#define QUAD_OUT_FAST_READ_CMD 0x6B

&

define QUAD_INOUT_FAST_READ_CMD¶

#define QUAD_INOUT_FAST_READ_CMD 0xEB

&

define QUAD_INOUT_FAST_READ_DTR_CMD¶

#define QUAD_INOUT_FAST_READ_DTR_CMD 0xED

&

define WRITE_ENABLE_CMD¶

#define WRITE_ENABLE_CMD 0x06

Write Operations

define WRITE_DISABLE_CMD¶

#define WRITE_DISABLE_CMD 0x04

&

define READ_STATUS_REG_CMD¶

#define READ_STATUS_REG_CMD 0x05

Register Operations

define WRITE_STATUS_REG_CMD¶

#define WRITE_STATUS_REG_CMD 0x01

&

define READ_FUNCTION_REGISTER¶

#define READ_FUNCTION_REGISTER 0X48

&

define WRITE_FUNCTION_REGISTER¶

#define WRITE_FUNCTION_REGISTER 0x42

&

define READ_READ_PARAM_REG_CMD¶

#define READ_READ_PARAM_REG_CMD 0x61

&

define READ_EXT_READ_PARAM_CMD¶

#define READ_EXT_READ_PARAM_CMD 0x81

&

define CLEAR_EXT_READ_PARAM_CMD¶

#define CLEAR_EXT_READ_PARAM_CMD 0x82

&

define WRITE_READ_PARAM_REG_CMD¶

#define WRITE_READ_PARAM_REG_CMD 0xC0

&

define WRITE_NV_READ_PARAM_REG_CMD¶

#define WRITE_NV_READ_PARAM_REG_CMD 0x65

non-volatile

define EXT_WRITE_READ_PARAM_REG_CMD¶

#define EXT_WRITE_READ_PARAM_REG_CMD 0x63

volatile

define WRITE_EXT_READ_PARAM_REG_CMD¶

#define WRITE_EXT_READ_PARAM_REG_CMD 0x83

volatile

define WRITE_EXT_NV_READ_PARAM_REG_CMD¶

#define WRITE_EXT_NV_READ_PARAM_REG_CMD 0x85

non-volatile

define QUAD_IN_FAST_PROG_CMD¶

#define QUAD_IN_FAST_PROG_CMD 0x32

&

define EXT_QUAD_IN_FAST_PROG_CMD¶

#define EXT_QUAD_IN_FAST_PROG_CMD 0x38

&

define SECTOR_ERASE_CMD¶

#define SECTOR_ERASE_CMD 0xd7

Erase Operations

define SECTOR_ERASE_QPI_CMD¶

#define SECTOR_ERASE_QPI_CMD 0x20

&

define BLOCK_ERASE_CMD¶

#define BLOCK_ERASE_CMD 0xD8

&

define BLOCK_ERASE_32K_CMD¶

#define BLOCK_ERASE_32K_CMD 0x52

&

define CHIP_ERASE_CMD¶

#define CHIP_ERASE_CMD 0xC7

&

define EXT_CHIP_ERASE_CMD¶

#define EXT_CHIP_ERASE_CMD 0x60

&

define PROG_ERASE_RESUME_CMD¶

#define PROG_ERASE_RESUME_CMD 0x7A

&

define EXT_PROG_ERASE_RESUME_CMD¶

#define EXT_PROG_ERASE_RESUME_CMD 0x30

&

define PROG_ERASE_SUSPEND_CMD¶

#define PROG_ERASE_SUSPEND_CMD 0x75

&

define EXT_PROG_ERASE_SUSPEND_CMD¶

#define EXT_PROG_ERASE_SUSPEND_CMD 0xB0

&

define ENTER_QUAD_CMD¶

#define ENTER_QUAD_CMD 0x35

Quad Operations

define EXIT_QUAD_CMD¶

#define EXIT_QUAD_CMD 0xF5

&

define IS25LP080D_SR_WIP¶

#define IS25LP080D_SR_WIP ((uint8_t)0x01)

IS25LP08D Registers

Status Register Write in progress

define IS25LP080D_SR_WREN¶

#define IS25LP080D_SR_WREN ((uint8_t)0x02)

Write enable latch

define IS25LP080D_SR_SRWREN¶

#define IS25LP080D_SR_SRWREN     ((uint8_t)0x80)

Status register write enable/disable

define IS25LP080D_SR_QE¶

#define IS25LP080D_SR_QE ((uint8_t)0x40)

&

define IS25LP080D_NVCR_NBADDR¶

#define IS25LP080D_NVCR_NBADDR     ((uint16_t)0x0001)

3-bytes or 4-bytes addressing

define IS25LP080D_NVCR_SEGMENT¶

#define IS25LP080D_NVCR_SEGMENT     ((uint16_t)0x0002)

Upper or lower 128Mb segment selected by default

define IS25LP080D_NVCR_DUAL¶

#define IS25LP080D_NVCR_DUAL ((uint16_t)0x0004)

Dual I/O protocol

define IS25LP080D_NVCR_QUAB¶

#define IS25LP080D_NVCR_QUAB ((uint16_t)0x0008)

Quad I/O protocol

define IS25LP080D_NVCR_RH¶

#define IS25LP080D_NVCR_RH ((uint16_t)0x0010)

Reset/hold

define IS25LP080D_NVCR_DTRP¶

#define IS25LP080D_NVCR_DTRP     ((uint16_t)0x0020)

Double transfer rate protocol

define IS25LP080D_NVCR_ODS¶

#define IS25LP080D_NVCR_ODS ((uint16_t)0x01C0)

Output driver strength

define IS25LP080D_NVCR_XIP¶

#define IS25LP080D_NVCR_XIP     ((uint16_t)0x0E00)

XIP mode at power-on reset

define IS25LP080D_NVCR_NB_DUMMY¶

#define IS25LP080D_NVCR_NB_DUMMY     ((uint16_t)0xF000)

Number of dummy clock cycles

define IS25LP080D_VCR_WRAP¶

#define IS25LP080D_VCR_WRAP ((uint8_t)0x03)

Wrap

define IS25LP080D_VCR_XIP¶

#define IS25LP080D_VCR_XIP ((uint8_t)0x08)

XIP

define IS25LP080D_VCR_NB_DUMMY¶

#define IS25LP080D_VCR_NB_DUMMY     ((uint8_t)0xF0)

Number of dummy clock cycles

define IS25LP080D_EAR_HIGHEST_SE¶

#define IS25LP080D_EAR_HIGHEST_SE     ((uint8_t)0x03)

Select the Highest 128Mb segment

define IS25LP080D_EAR_THIRD_SEG¶

#define IS25LP080D_EAR_THIRD_SEG     ((uint8_t)0x02)

Select the Third 128Mb segment

define IS25LP080D_EAR_SECOND_SEG¶

#define IS25LP080D_EAR_SECOND_SEG     ((uint8_t)0x01)

Select the Second 128Mb segment

define IS25LP080D_EAR_LOWEST_SEG¶

#define IS25LP080D_EAR_LOWEST_SEG     ((uint8_t)0x00)

Select the Lowest 128Mb segment (default)

define IS25LP080D_EVCR_ODS¶

#define IS25LP080D_EVCR_ODS ((uint8_t)0x07)

Output driver strength

define IS25LP080D_EVCR_RH¶

#define IS25LP080D_EVCR_RH ((uint8_t)0x10)

Reset/hold

define IS25LP080D_EVCR_DTRP¶

#define IS25LP080D_EVCR_DTRP     ((uint8_t)0x20)

Double transfer rate protocol

define IS25LP080D_EVCR_DUAL¶

#define IS25LP080D_EVCR_DUAL ((uint8_t)0x40)

Dual I/O protocol

define IS25LP080D_EVCR_QUAD¶

#define IS25LP080D_EVCR_QUAD ((uint8_t)0x80)

Quad I/O protocol

define IS25LP080D_FSR_NBADDR¶

#define IS25LP080D_FSR_NBADDR     ((uint8_t)0x01)

3-bytes or 4-bytes addressing

define IS25LP080D_FSR_PRERR¶

#define IS25LP080D_FSR_PRERR ((uint8_t)0x02)

Protection error

define IS25LP080D_FSR_PGSUS¶

#define IS25LP080D_FSR_PGSUS ((uint8_t)0x04)

Program operation suspended

define IS25LP080D_FSR_PGERR¶

#define IS25LP080D_FSR_PGERR ((uint8_t)0x10)

Program error

define IS25LP080D_FSR_ERERR¶

#define IS25LP080D_FSR_ERERR ((uint8_t)0x20)

Erase error

define IS25LP080D_FSR_ERSUS¶

#define IS25LP080D_FSR_ERSUS ((uint8_t)0x40)

Erase operation suspended

define IS25LP080D_FSR_READY¶

#define IS25LP080D_FSR_READY     ((uint8_t)0x80)

Ready or command in progress

Updated on 2024-01-03 at 19:41:01 +0000