Group flash¶

IS25LP08D Commands __

Macros¶

Type	Name
define	BLOCK_ERASE_32K_CMD `0x52`
define	BLOCK_ERASE_32K_CMD `0x52`
define	BLOCK_ERASE_CMD `0xD8`
define	BLOCK_ERASE_CMD `0xD8`
define	CHIP_ERASE_CMD `0xC7`
define	CHIP_ERASE_CMD `0xC7`
define	CLEAR_EXT_READ_PARAM_CMD `0x82`
define	DUAL_INOUT_FAST_READ_CMD `0xBB`
define	DUAL_INOUT_FAST_READ_CMD `0xBB`
define	DUAL_INOUT_FAST_READ_DTR_CMD `0xBD`
define	DUAL_INOUT_FAST_READ_DTR_CMD `0xBD`
define	DUAL_OUT_FAST_READ_CMD `0x3B`
define	DUAL_OUT_FAST_READ_CMD `0x3B`
define	ENTER_DEEP_POWER_DOWN `0XB9`
define	ENTER_DEEP_POWER_DOWN `0XB9`
define	ENTER_QUAD_CMD `0x35`
define	ENTER_QUAD_CMD `0x35`
define	EXIT_DEEP_POWER_DOWN `0XB9`
define	EXIT_DEEP_POWER_DOWN `0XB9`
define	EXIT_QUAD_CMD `0xF5`
define	EXIT_QUAD_CMD `0xF5`
define	EXT_CHIP_ERASE_CMD `0x60`
define	EXT_CHIP_ERASE_CMD `0x60`
define	EXT_PROG_ERASE_RESUME_CMD `0x30`
define	EXT_PROG_ERASE_RESUME_CMD `0x30`
define	EXT_PROG_ERASE_SUSPEND_CMD `0xB0`
define	EXT_PROG_ERASE_SUSPEND_CMD `0xB0`
define	EXT_QUAD_IN_FAST_PROG_CMD `0x38`
define	EXT_QUAD_IN_PAGE_PROG_CMD `0x38`
define	EXT_QUAD_IN_PAGE_PROG_CMD `0x38`
define	EXT_WRITE_READ_PARAM_REG_CMD `0x63`
define	FAST_READ_CMD `0x0B`
define	FAST_READ_CMD `0x0B`
define	FAST_READ_DTR_CMD `0x0D`
define	FAST_READ_DTR_CMD `0x0D`
define	INFO_ROW_ERASE_CMD `0x64`
define	INFO_ROW_ERASE_CMD `0x64`
define	INFO_ROW_PROGRAM_CMD `0x62`
define	INFO_ROW_PROGRAM_CMD `0x62`
define	INFO_ROW_READ_CMD `0x68`
define	INFO_ROW_READ_CMD `0x68`
define	IS25LP064A_EAR_HIGHEST_SE `((uint8\_t)0x03)`
define	IS25LP064A_EAR_LOWEST_SEG `((uint8\_t)0x00)`
define	IS25LP064A_EAR_SECOND_SEG `((uint8\_t)0x01)`
define	IS25LP064A_EAR_THIRD_SEG `((uint8\_t)0x02)`
define	IS25LP064A_EVCR_DTRP `((uint8\_t)0x20)`
define	IS25LP064A_EVCR_DUAL `((uint8\_t)0x40)`
define	IS25LP064A_EVCR_ODS `((uint8\_t)0x07)`
define	IS25LP064A_EVCR_QUAD `((uint8\_t)0x80)`
define	IS25LP064A_EVCR_RH `((uint8\_t)0x10)`
define	IS25LP064A_FSR_ERERR `((uint8\_t)0x20)`
define	IS25LP064A_FSR_ERSUS `((uint8\_t)0x40)`
define	IS25LP064A_FSR_NBADDR `((uint8\_t)0x01)`
define	IS25LP064A_FSR_PGERR `((uint8\_t)0x10)`
define	IS25LP064A_FSR_PGSUS `((uint8\_t)0x04)`
define	IS25LP064A_FSR_PRERR `((uint8\_t)0x02)`
define	IS25LP064A_FSR_READY `((uint8\_t)0x80)`
define	IS25LP064A_NVCR_DTRP `((uint16\_t)0x0020)`
define	IS25LP064A_NVCR_DUAL `((uint16\_t)0x0004)`
define	IS25LP064A_NVCR_NBADDR `((uint16\_t)0x0001)`
define	IS25LP064A_NVCR_NB_DUMMY `((uint16\_t)0xF000)`
define	IS25LP064A_NVCR_ODS `((uint16\_t)0x01C0)`
define	IS25LP064A_NVCR_QUAB `((uint16\_t)0x0008)`
define	IS25LP064A_NVCR_RH `((uint16\_t)0x0010)`
define	IS25LP064A_NVCR_SEGMENT `((uint16\_t)0x0002)`
define	IS25LP064A_NVCR_XIP `((uint16\_t)0x0E00)`
define	IS25LP064A_SR_QE `((uint8\_t)0x40)`
define	IS25LP064A_SR_SRWREN `((uint8\_t)0x80)`
define	IS25LP064A_SR_WIP `((uint8\_t)0x01)` IS25LP08D Registers __
define	IS25LP064A_SR_WREN `((uint8\_t)0x02)`
define	IS25LP064A_VCR_NB_DUMMY `((uint8\_t)0xF0)`
define	IS25LP064A_VCR_WRAP `((uint8\_t)0x03)`
define	IS25LP064A_VCR_XIP `((uint8\_t)0x08)`
define	IS25LP080D_EAR_HIGHEST_SE `((uint8\_t)0x03)`
define	IS25LP080D_EAR_LOWEST_SEG `((uint8\_t)0x00)`
define	IS25LP080D_EAR_SECOND_SEG `((uint8\_t)0x01)`
define	IS25LP080D_EAR_THIRD_SEG `((uint8\_t)0x02)`
define	IS25LP080D_EVCR_DTRP `((uint8\_t)0x20)`
define	IS25LP080D_EVCR_DUAL `((uint8\_t)0x40)`
define	IS25LP080D_EVCR_ODS `((uint8\_t)0x07)`
define	IS25LP080D_EVCR_QUAD `((uint8\_t)0x80)`
define	IS25LP080D_EVCR_RH `((uint8\_t)0x10)`
define	IS25LP080D_FSR_ERERR `((uint8\_t)0x20)`
define	IS25LP080D_FSR_ERSUS `((uint8\_t)0x40)`
define	IS25LP080D_FSR_NBADDR `((uint8\_t)0x01)`
define	IS25LP080D_FSR_PGERR `((uint8\_t)0x10)`
define	IS25LP080D_FSR_PGSUS `((uint8\_t)0x04)`
define	IS25LP080D_FSR_PRERR `((uint8\_t)0x02)`
define	IS25LP080D_FSR_READY `((uint8\_t)0x80)`
define	IS25LP080D_NVCR_DTRP `((uint16\_t)0x0020)`
define	IS25LP080D_NVCR_DUAL `((uint16\_t)0x0004)`
define	IS25LP080D_NVCR_NBADDR `((uint16\_t)0x0001)`
define	IS25LP080D_NVCR_NB_DUMMY `((uint16\_t)0xF000)`
define	IS25LP080D_NVCR_ODS `((uint16\_t)0x01C0)`
define	IS25LP080D_NVCR_QUAB `((uint16\_t)0x0008)`
define	IS25LP080D_NVCR_RH `((uint16\_t)0x0010)`
define	IS25LP080D_NVCR_SEGMENT `((uint16\_t)0x0002)`
define	IS25LP080D_NVCR_XIP `((uint16\_t)0x0E00)`
define	IS25LP080D_SR_QE `((uint8\_t)0x40)`
define	IS25LP080D_SR_SRWREN `((uint8\_t)0x80)`
define	IS25LP080D_SR_WIP `((uint8\_t)0x01)` IS25LP08D Registers __
define	IS25LP080D_SR_WREN `((uint8\_t)0x02)`
define	IS25LP080D_VCR_NB_DUMMY `((uint8\_t)0xF0)`
define	IS25LP080D_VCR_WRAP `((uint8\_t)0x03)`
define	IS25LP080D_VCR_XIP `((uint8\_t)0x08)`
define	MULTIPLE_IO_READ_ID_CMD `0xAF`
define	MULTIPLE_IO_READ_ID_CMD `0xAF`
define	NO_OP `0x00`
define	NO_OP `0x00`
define	PAGE_PROG_CMD `0x02`
define	PAGE_PROG_CMD `0x02`
define	PAGE_PROG_CMD `0x02`
define	PROG_ERASE_RESUME_CMD `0x7A`
define	PROG_ERASE_RESUME_CMD `0x7A`
define	PROG_ERASE_SUSPEND_CMD `0x75`
define	PROG_ERASE_SUSPEND_CMD `0x75`
define	QUAD_INOUT_FAST_READ_CMD `0xEB`
define	QUAD_INOUT_FAST_READ_CMD `0xEB`
define	QUAD_INOUT_FAST_READ_DTR_CMD `0xED`
define	QUAD_INOUT_FAST_READ_DTR_CMD `0xED`
define	QUAD_IN_FAST_PROG_CMD `0x32`
define	QUAD_IN_PAGE_PROG_CMD `0x32`
define	QUAD_IN_PAGE_PROG_CMD `0x32`
define	QUAD_OUT_FAST_READ_CMD `0x6B`
define	QUAD_OUT_FAST_READ_CMD `0x6B`
define	READ_CMD `0x03`
define	READ_CMD `0x03`
define	READ_EXT_READ_PARAM_CMD `0x81`
define	READ_FUNCTION_REGISTER `0X48`
define	READ_FUNCTION_REGISTER `0X48`
define	READ_ID_CMD `0xAB`
define	READ_ID_CMD `0xAB`
define	READ_ID_CMD2 `0x9F`
define	READ_ID_CMD2 `0x9F`
define	READ_MANUFACT_AND_ID `0x90`
define	READ_MANUFACT_AND_ID `0x90`
define	READ_READ_PARAM_REG_CMD `0x61`
define	READ_SERIAL_FLASH_DISCO_PARAM_CMD `0x5A`
define	READ_SERIAL_FLASH_DISCO_PARAM_CMD `0x5A`
define	READ_STATUS_REG_CMD `0x05`
define	READ_STATUS_REG_CMD `0x05`
define	READ_UNIQUE_ID `0x4B`
define	READ_UNIQUE_ID `0x4B`
define	RESET_ENABLE_CMD `0x66`
define	RESET_ENABLE_CMD `0x66`
define	RESET_MEMORY_CMD `0x99`
define	RESET_MEMORY_CMD `0x99`
define	SECTOR_ERASE_CMD `0xd7`
define	SECTOR_ERASE_CMD `0xd7`
define	SECTOR_ERASE_QPI_CMD `0x20`
define	SECTOR_ERASE_QPI_CMD `0x20`
define	SECTOR_LOCK `0x24`
define	SECTOR_LOCK `0x24`
define	SECTOR_UNLOCK `0x26`
define	SECTOR_UNLOCK `0x26`
define	WRITE_DISABLE_CMD `0x04`
define	WRITE_DISABLE_CMD `0x04`
define	WRITE_ENABLE_CMD `0x06`
define	WRITE_ENABLE_CMD `0x06`
define	WRITE_EXT_NV_READ_PARAM_REG_CMD `0x85`
define	WRITE_EXT_READ_PARAM_REG_CMD `0x83`
define	WRITE_FUNCTION_REGISTER `0x42`
define	WRITE_FUNCTION_REGISTER `0x42`
define	WRITE_NV_READ_PARAM_REG_CMD `0x65`
define	WRITE_READ_PARAM_REG_CMD `0xC0`
define	WRITE_READ_PARAM_REG_CMD `0xC0`
define	WRITE_STATUS_REG_CMD `0x01`
define	WRITE_STATUS_REG_CMD `0x01`

Macro Definition Documentation¶

define BLOCK_ERASE_32K_CMD¶

#define BLOCK_ERASE_32K_CMD `0x52`

&

define BLOCK_ERASE_32K_CMD¶

#define BLOCK_ERASE_32K_CMD `0x52`

&

define BLOCK_ERASE_CMD¶

#define BLOCK_ERASE_CMD `0xD8`

&

define BLOCK_ERASE_CMD¶

#define BLOCK_ERASE_CMD `0xD8`

&

define CHIP_ERASE_CMD¶

#define CHIP_ERASE_CMD `0xC7`

&

define CHIP_ERASE_CMD¶

#define CHIP_ERASE_CMD `0xC7`

&

define CLEAR_EXT_READ_PARAM_CMD¶

#define CLEAR_EXT_READ_PARAM_CMD `0x82`

&

define DUAL_INOUT_FAST_READ_CMD¶

#define DUAL_INOUT_FAST_READ_CMD `0xBB`

&

define DUAL_INOUT_FAST_READ_CMD¶

#define DUAL_INOUT_FAST_READ_CMD `0xBB`

&

define DUAL_INOUT_FAST_READ_DTR_CMD¶

#define DUAL_INOUT_FAST_READ_DTR_CMD `0xBD`

&

define DUAL_INOUT_FAST_READ_DTR_CMD¶

#define DUAL_INOUT_FAST_READ_DTR_CMD `0xBD`

&

define DUAL_OUT_FAST_READ_CMD¶

#define DUAL_OUT_FAST_READ_CMD `0x3B`

&

define DUAL_OUT_FAST_READ_CMD¶

#define DUAL_OUT_FAST_READ_CMD `0x3B`

&

define ENTER_DEEP_POWER_DOWN¶

#define ENTER_DEEP_POWER_DOWN `0XB9`

Low Power Modes &

define ENTER_DEEP_POWER_DOWN¶

#define ENTER_DEEP_POWER_DOWN `0XB9`

Low Power Modes &

define ENTER_QUAD_CMD¶

#define ENTER_QUAD_CMD `0x35`

Quad Operations

define ENTER_QUAD_CMD¶

#define ENTER_QUAD_CMD `0x35`

Quad Operations

define EXIT_DEEP_POWER_DOWN¶

#define EXIT_DEEP_POWER_DOWN `0XB9`

&

define EXIT_DEEP_POWER_DOWN¶

#define EXIT_DEEP_POWER_DOWN `0XB9`

&

define EXIT_QUAD_CMD¶

#define EXIT_QUAD_CMD `0xF5`

&

define EXIT_QUAD_CMD¶

#define EXIT_QUAD_CMD `0xF5`

&

define EXT_CHIP_ERASE_CMD¶

#define EXT_CHIP_ERASE_CMD `0x60`

&

define EXT_CHIP_ERASE_CMD¶

#define EXT_CHIP_ERASE_CMD `0x60`

&

define EXT_PROG_ERASE_RESUME_CMD¶

#define EXT_PROG_ERASE_RESUME_CMD `0x30`

&

define EXT_PROG_ERASE_RESUME_CMD¶

#define EXT_PROG_ERASE_RESUME_CMD `0x30`

&

define EXT_PROG_ERASE_SUSPEND_CMD¶

#define EXT_PROG_ERASE_SUSPEND_CMD `0xB0`

&

define EXT_PROG_ERASE_SUSPEND_CMD¶

#define EXT_PROG_ERASE_SUSPEND_CMD `0xB0`

&

define EXT_QUAD_IN_FAST_PROG_CMD¶

#define EXT_QUAD_IN_FAST_PROG_CMD `0x38`

&

define EXT_QUAD_IN_PAGE_PROG_CMD¶

#define EXT_QUAD_IN_PAGE_PROG_CMD `0x38`

&

define EXT_QUAD_IN_PAGE_PROG_CMD¶

#define EXT_QUAD_IN_PAGE_PROG_CMD `0x38`

&

define EXT_WRITE_READ_PARAM_REG_CMD¶

#define EXT_WRITE_READ_PARAM_REG_CMD `0x63`

volatile

define FAST_READ_CMD¶

#define FAST_READ_CMD `0x0B`

&

define FAST_READ_CMD¶

#define FAST_READ_CMD `0x0B`

&

define FAST_READ_DTR_CMD¶

#define FAST_READ_DTR_CMD `0x0D`

&

define FAST_READ_DTR_CMD¶

#define FAST_READ_DTR_CMD `0x0D`

&

define INFO_ROW_ERASE_CMD¶

#define INFO_ROW_ERASE_CMD `0x64`

Security Information Row &

define INFO_ROW_ERASE_CMD¶

#define INFO_ROW_ERASE_CMD `0x64`

Security Information Row &

define INFO_ROW_PROGRAM_CMD¶

#define INFO_ROW_PROGRAM_CMD `0x62`

&

define INFO_ROW_PROGRAM_CMD¶

#define INFO_ROW_PROGRAM_CMD `0x62`

&

define INFO_ROW_READ_CMD¶

#define INFO_ROW_READ_CMD `0x68`

&

define INFO_ROW_READ_CMD¶

#define INFO_ROW_READ_CMD `0x68`

&

define IS25LP064A_EAR_HIGHEST_SE¶

#define IS25LP064A_EAR_HIGHEST_SE `((uint8_t)0x03)`

Select the Highest 128Mb segment

define IS25LP064A_EAR_LOWEST_SEG¶

#define IS25LP064A_EAR_LOWEST_SEG `((uint8_t)0x00)`

Select the Lowest 128Mb segment (default)

define IS25LP064A_EAR_SECOND_SEG¶

#define IS25LP064A_EAR_SECOND_SEG `((uint8_t)0x01)`

Select the Second 128Mb segment

define IS25LP064A_EAR_THIRD_SEG¶

#define IS25LP064A_EAR_THIRD_SEG `((uint8_t)0x02)`

Select the Third 128Mb segment

define IS25LP064A_EVCR_DTRP¶

#define IS25LP064A_EVCR_DTRP `((uint8_t)0x20)`

Double transfer rate protocol

define IS25LP064A_EVCR_DUAL¶

#define IS25LP064A_EVCR_DUAL `((uint8_t)0x40)`

Dual I/O protocol

define IS25LP064A_EVCR_ODS¶

#define IS25LP064A_EVCR_ODS `((uint8_t)0x07)`

Output driver strength

define IS25LP064A_EVCR_QUAD¶

#define IS25LP064A_EVCR_QUAD `((uint8_t)0x80)`

Quad I/O protocol

define IS25LP064A_EVCR_RH¶

#define IS25LP064A_EVCR_RH `((uint8_t)0x10)`

Reset/hold

define IS25LP064A_FSR_ERERR¶

#define IS25LP064A_FSR_ERERR `((uint8_t)0x20)`

Erase error

define IS25LP064A_FSR_ERSUS¶

#define IS25LP064A_FSR_ERSUS `((uint8_t)0x40)`

Erase operation suspended

define IS25LP064A_FSR_NBADDR¶

#define IS25LP064A_FSR_NBADDR `((uint8_t)0x01)`

3-bytes or 4-bytes addressing

define IS25LP064A_FSR_PGERR¶

#define IS25LP064A_FSR_PGERR `((uint8_t)0x10)`

Program error

define IS25LP064A_FSR_PGSUS¶

#define IS25LP064A_FSR_PGSUS `((uint8_t)0x04)`

Program operation suspended

define IS25LP064A_FSR_PRERR¶

#define IS25LP064A_FSR_PRERR `((uint8_t)0x02)`

Protection error

define IS25LP064A_FSR_READY¶

#define IS25LP064A_FSR_READY `((uint8_t)0x80)`

Ready or command in progress

define IS25LP064A_NVCR_DTRP¶

#define IS25LP064A_NVCR_DTRP `((uint16_t)0x0020)`

Double transfer rate protocol

define IS25LP064A_NVCR_DUAL¶

#define IS25LP064A_NVCR_DUAL `((uint16_t)0x0004)`

Dual I/O protocol

define IS25LP064A_NVCR_NBADDR¶

#define IS25LP064A_NVCR_NBADDR `((uint16_t)0x0001)`

3-bytes or 4-bytes addressing

define IS25LP064A_NVCR_NB_DUMMY¶

#define IS25LP064A_NVCR_NB_DUMMY `((uint16_t)0xF000)`

Number of dummy clock cycles

define IS25LP064A_NVCR_ODS¶

#define IS25LP064A_NVCR_ODS `((uint16_t)0x01C0)`

Output driver strength

define IS25LP064A_NVCR_QUAB¶

#define IS25LP064A_NVCR_QUAB `((uint16_t)0x0008)`

Quad I/O protocol

define IS25LP064A_NVCR_RH¶

#define IS25LP064A_NVCR_RH `((uint16_t)0x0010)`

Reset/hold

define IS25LP064A_NVCR_SEGMENT¶

#define IS25LP064A_NVCR_SEGMENT `((uint16_t)0x0002)`

Upper or lower 128Mb segment selected by default

define IS25LP064A_NVCR_XIP¶

#define IS25LP064A_NVCR_XIP `((uint16_t)0x0E00)`

XIP mode at power-on reset

define IS25LP064A_SR_QE¶

#define IS25LP064A_SR_QE `((uint8_t)0x40)`

&

define IS25LP064A_SR_SRWREN¶

#define IS25LP064A_SR_SRWREN `((uint8_t)0x80)`

Status register write enable/disable

define IS25LP064A_SR_WIP¶

IS25LP08D Registers __

#define IS25LP064A_SR_WIP `((uint8_t)0x01)`

Write in progress

define IS25LP064A_SR_WREN¶

#define IS25LP064A_SR_WREN `((uint8_t)0x02)`

Write enable latch

define IS25LP064A_VCR_NB_DUMMY¶

#define IS25LP064A_VCR_NB_DUMMY `((uint8_t)0xF0)`

Number of dummy clock cycles

define IS25LP064A_VCR_WRAP¶

#define IS25LP064A_VCR_WRAP `((uint8_t)0x03)`

Wrap

define IS25LP064A_VCR_XIP¶

#define IS25LP064A_VCR_XIP `((uint8_t)0x08)`

XIP

define IS25LP080D_EAR_HIGHEST_SE¶

#define IS25LP080D_EAR_HIGHEST_SE `((uint8_t)0x03)`

Select the Highest 128Mb segment

define IS25LP080D_EAR_LOWEST_SEG¶

#define IS25LP080D_EAR_LOWEST_SEG `((uint8_t)0x00)`

Select the Lowest 128Mb segment (default)

define IS25LP080D_EAR_SECOND_SEG¶

#define IS25LP080D_EAR_SECOND_SEG `((uint8_t)0x01)`

Select the Second 128Mb segment

define IS25LP080D_EAR_THIRD_SEG¶

#define IS25LP080D_EAR_THIRD_SEG `((uint8_t)0x02)`

Select the Third 128Mb segment

define IS25LP080D_EVCR_DTRP¶

#define IS25LP080D_EVCR_DTRP `((uint8_t)0x20)`

Double transfer rate protocol

define IS25LP080D_EVCR_DUAL¶

#define IS25LP080D_EVCR_DUAL `((uint8_t)0x40)`

Dual I/O protocol

define IS25LP080D_EVCR_ODS¶

#define IS25LP080D_EVCR_ODS `((uint8_t)0x07)`

Output driver strength

define IS25LP080D_EVCR_QUAD¶

#define IS25LP080D_EVCR_QUAD `((uint8_t)0x80)`

Quad I/O protocol

define IS25LP080D_EVCR_RH¶

#define IS25LP080D_EVCR_RH `((uint8_t)0x10)`

Reset/hold

define IS25LP080D_FSR_ERERR¶

#define IS25LP080D_FSR_ERERR `((uint8_t)0x20)`

Erase error

define IS25LP080D_FSR_ERSUS¶

#define IS25LP080D_FSR_ERSUS `((uint8_t)0x40)`

Erase operation suspended

define IS25LP080D_FSR_NBADDR¶

#define IS25LP080D_FSR_NBADDR `((uint8_t)0x01)`

3-bytes or 4-bytes addressing

define IS25LP080D_FSR_PGERR¶

#define IS25LP080D_FSR_PGERR `((uint8_t)0x10)`

Program error

define IS25LP080D_FSR_PGSUS¶

#define IS25LP080D_FSR_PGSUS `((uint8_t)0x04)`

Program operation suspended

define IS25LP080D_FSR_PRERR¶

#define IS25LP080D_FSR_PRERR `((uint8_t)0x02)`

Protection error

define IS25LP080D_FSR_READY¶

#define IS25LP080D_FSR_READY `((uint8_t)0x80)`

Ready or command in progress

define IS25LP080D_NVCR_DTRP¶

#define IS25LP080D_NVCR_DTRP `((uint16_t)0x0020)`

Double transfer rate protocol

define IS25LP080D_NVCR_DUAL¶

#define IS25LP080D_NVCR_DUAL `((uint16_t)0x0004)`

Dual I/O protocol

define IS25LP080D_NVCR_NBADDR¶

#define IS25LP080D_NVCR_NBADDR `((uint16_t)0x0001)`

3-bytes or 4-bytes addressing

define IS25LP080D_NVCR_NB_DUMMY¶

#define IS25LP080D_NVCR_NB_DUMMY `((uint16_t)0xF000)`

Number of dummy clock cycles

define IS25LP080D_NVCR_ODS¶

#define IS25LP080D_NVCR_ODS `((uint16_t)0x01C0)`

Output driver strength

define IS25LP080D_NVCR_QUAB¶

#define IS25LP080D_NVCR_QUAB `((uint16_t)0x0008)`

Quad I/O protocol

define IS25LP080D_NVCR_RH¶

#define IS25LP080D_NVCR_RH `((uint16_t)0x0010)`

Reset/hold

define IS25LP080D_NVCR_SEGMENT¶

#define IS25LP080D_NVCR_SEGMENT `((uint16_t)0x0002)`

Upper or lower 128Mb segment selected by default

define IS25LP080D_NVCR_XIP¶

#define IS25LP080D_NVCR_XIP `((uint16_t)0x0E00)`

XIP mode at power-on reset

define IS25LP080D_SR_QE¶

#define IS25LP080D_SR_QE `((uint8_t)0x40)`

&

define IS25LP080D_SR_SRWREN¶

#define IS25LP080D_SR_SRWREN `((uint8_t)0x80)`

Status register write enable/disable

define IS25LP080D_SR_WIP¶

IS25LP08D Registers __

#define IS25LP080D_SR_WIP `((uint8_t)0x01)`

Status Register Write in progress

define IS25LP080D_SR_WREN¶

#define IS25LP080D_SR_WREN `((uint8_t)0x02)`

Write enable latch

define IS25LP080D_VCR_NB_DUMMY¶

#define IS25LP080D_VCR_NB_DUMMY `((uint8_t)0xF0)`

Number of dummy clock cycles

define IS25LP080D_VCR_WRAP¶

#define IS25LP080D_VCR_WRAP `((uint8_t)0x03)`

Wrap

define IS25LP080D_VCR_XIP¶

#define IS25LP080D_VCR_XIP `((uint8_t)0x08)`

XIP

define MULTIPLE_IO_READ_ID_CMD¶

#define MULTIPLE_IO_READ_ID_CMD `0xAF`

&

define MULTIPLE_IO_READ_ID_CMD¶

#define MULTIPLE_IO_READ_ID_CMD `0xAF`

&

define NO_OP¶

#define NO_OP `0x00`

Cancels Reset Enable

define NO_OP¶

#define NO_OP `0x00`

Cancels Reset Enable

define PAGE_PROG_CMD¶

#define PAGE_PROG_CMD `0x02`

Page Program Operations

Page Operations

Program Operations

define PAGE_PROG_CMD¶

#define PAGE_PROG_CMD `0x02`

Page Program Operations

Page Operations

Program Operations

define PAGE_PROG_CMD¶

#define PAGE_PROG_CMD `0x02`

Page Program Operations

Page Operations

Program Operations

define PROG_ERASE_RESUME_CMD¶

#define PROG_ERASE_RESUME_CMD `0x7A`

&

define PROG_ERASE_RESUME_CMD¶

#define PROG_ERASE_RESUME_CMD `0x7A`

&

define PROG_ERASE_SUSPEND_CMD¶

#define PROG_ERASE_SUSPEND_CMD `0x75`

&

define PROG_ERASE_SUSPEND_CMD¶

#define PROG_ERASE_SUSPEND_CMD `0x75`

&

define QUAD_INOUT_FAST_READ_CMD¶

#define QUAD_INOUT_FAST_READ_CMD `0xEB`

&

define QUAD_INOUT_FAST_READ_CMD¶

#define QUAD_INOUT_FAST_READ_CMD `0xEB`

&

define QUAD_INOUT_FAST_READ_DTR_CMD¶

#define QUAD_INOUT_FAST_READ_DTR_CMD `0xED`

&

define QUAD_INOUT_FAST_READ_DTR_CMD¶

#define QUAD_INOUT_FAST_READ_DTR_CMD `0xED`

&

define QUAD_IN_FAST_PROG_CMD¶

#define QUAD_IN_FAST_PROG_CMD `0x32`

&

define QUAD_IN_PAGE_PROG_CMD¶

#define QUAD_IN_PAGE_PROG_CMD `0x32`

&

define QUAD_IN_PAGE_PROG_CMD¶

#define QUAD_IN_PAGE_PROG_CMD `0x32`

&

define QUAD_OUT_FAST_READ_CMD¶

#define QUAD_OUT_FAST_READ_CMD `0x6B`

&

define QUAD_OUT_FAST_READ_CMD¶

#define QUAD_OUT_FAST_READ_CMD `0x6B`

&

define READ_CMD¶

#define READ_CMD `0x03`

Read Operations

define READ_CMD¶

#define READ_CMD `0x03`

Read Operations

define READ_EXT_READ_PARAM_CMD¶

#define READ_EXT_READ_PARAM_CMD `0x81`

&

define READ_FUNCTION_REGISTER¶

#define READ_FUNCTION_REGISTER `0X48`

&

define READ_FUNCTION_REGISTER¶

#define READ_FUNCTION_REGISTER `0X48`

&

define READ_ID_CMD¶

#define READ_ID_CMD `0xAB`

Identification Operations

define READ_ID_CMD¶

#define READ_ID_CMD `0xAB`

Identification Operations

define READ_ID_CMD2¶

#define READ_ID_CMD2 `0x9F`

&

define READ_ID_CMD2¶

#define READ_ID_CMD2 `0x9F`

&

define READ_MANUFACT_AND_ID¶

#define READ_MANUFACT_AND_ID `0x90`

&

define READ_MANUFACT_AND_ID¶

#define READ_MANUFACT_AND_ID `0x90`

&

define READ_READ_PARAM_REG_CMD¶

#define READ_READ_PARAM_REG_CMD `0x61`

&

define READ_SERIAL_FLASH_DISCO_PARAM_CMD¶

#define READ_SERIAL_FLASH_DISCO_PARAM_CMD `0x5A`

&

define READ_SERIAL_FLASH_DISCO_PARAM_CMD¶

#define READ_SERIAL_FLASH_DISCO_PARAM_CMD `0x5A`

&

define READ_STATUS_REG_CMD¶

#define READ_STATUS_REG_CMD `0x05`

Register Operations

define READ_STATUS_REG_CMD¶

#define READ_STATUS_REG_CMD `0x05`

Register Operations

define READ_UNIQUE_ID¶

#define READ_UNIQUE_ID `0x4B`

&

define READ_UNIQUE_ID¶

#define READ_UNIQUE_ID `0x4B`

&

define RESET_ENABLE_CMD¶

#define RESET_ENABLE_CMD `0x66`

Reset Operations

define RESET_ENABLE_CMD¶

#define RESET_ENABLE_CMD `0x66`

Reset Operations

define RESET_MEMORY_CMD¶

#define RESET_MEMORY_CMD `0x99`

&

define RESET_MEMORY_CMD¶

#define RESET_MEMORY_CMD `0x99`

&

define SECTOR_ERASE_CMD¶

#define SECTOR_ERASE_CMD `0xd7`

Erase Operations

define SECTOR_ERASE_CMD¶

#define SECTOR_ERASE_CMD `0xd7`

Erase Operations

define SECTOR_ERASE_QPI_CMD¶

#define SECTOR_ERASE_QPI_CMD `0x20`

&

define SECTOR_ERASE_QPI_CMD¶

#define SECTOR_ERASE_QPI_CMD `0x20`

&

define SECTOR_LOCK¶

#define SECTOR_LOCK `0x24`

&

define SECTOR_LOCK¶

#define SECTOR_LOCK `0x24`

&

define SECTOR_UNLOCK¶

#define SECTOR_UNLOCK `0x26`

&

define SECTOR_UNLOCK¶

#define SECTOR_UNLOCK `0x26`

&

define WRITE_DISABLE_CMD¶

#define WRITE_DISABLE_CMD `0x04`

&

define WRITE_DISABLE_CMD¶

#define WRITE_DISABLE_CMD `0x04`

&

define WRITE_ENABLE_CMD¶

#define WRITE_ENABLE_CMD `0x06`

Write Operations

define WRITE_ENABLE_CMD¶

#define WRITE_ENABLE_CMD `0x06`

Write Operations

define WRITE_EXT_NV_READ_PARAM_REG_CMD¶

#define WRITE_EXT_NV_READ_PARAM_REG_CMD `0x85`

non-volatile

define WRITE_EXT_READ_PARAM_REG_CMD¶

#define WRITE_EXT_READ_PARAM_REG_CMD `0x83`

volatile

define WRITE_FUNCTION_REGISTER¶

#define WRITE_FUNCTION_REGISTER `0x42`

&

define WRITE_FUNCTION_REGISTER¶

#define WRITE_FUNCTION_REGISTER `0x42`

&

define WRITE_NV_READ_PARAM_REG_CMD¶

#define WRITE_NV_READ_PARAM_REG_CMD `0x65`

non-volatile

define WRITE_READ_PARAM_REG_CMD¶

#define WRITE_READ_PARAM_REG_CMD `0xC0`

&

volatile

define WRITE_READ_PARAM_REG_CMD¶

#define WRITE_READ_PARAM_REG_CMD `0xC0`

&

volatile

define WRITE_STATUS_REG_CMD¶

#define WRITE_STATUS_REG_CMD `0x01`

&

define WRITE_STATUS_REG_CMD¶

#define WRITE_STATUS_REG_CMD `0x01`

&